Artículo
Pedre, S.; Krajník, T.; Todorovich, E.; Borensztejn, P. "Hardware/software co-design for real time embedded image processing: A case study" (2012) 17th Iberoamerican Congress on Progress in Pattern Recognition, Image Analysis, Computer Vision, and Applications, CIARP 2012. 7441 LNCS:599-606
Este artículo es de Acceso Abierto y puede ser descargado en su versión final desde nuestro repositorio
Consulte la política de Acceso Abierto del editor
Abstract:
Many image processing applications need real time performance, while having restrictions of size, weight and power consumption. These include a wide range of embedded systems from remote sensing applications to mobile phones. FPGA-based solutions are common for these applications, their main drawback being long development time. In this work a co-design methodology for processor-centric embedded systems with hardware acceleration using FPGAs is applied to an image processing method for localization of multiple robots. The goal of the methodology is to achieve a real-time embedded solution using hardware acceleration, but with development time similar to software projects. The final embedded co-designed solution processes 1600×1200 pixel images at a rate of 25 fps, achieving a 12.6× acceleration from the original software solution. This solution runs with a comparable speed as up-to-date PC-based systems, and it is smaller, cheaper and demands less power. © 2012 Springer-Verlag.
Registro:
| Documento: | Artículo |
| Título: | Hardware/software co-design for real time embedded image processing: A case study |
| Autor: | Pedre, S.; Krajník, T.; Todorovich, E.; Borensztejn, P. |
| Ciudad: | Buenos Aires |
| Filiación: | Departamento de Computación, FCEN-UBA, Argentina Czech Technical University, Prague, Czech Republic Departamento de Computación Y Sistemas, FCE-UNICEN, Argentina |
| Palabras clave: | FPGA; hardware/software co-design methodology; real time image processing; robotics; Co-design methodology; Development time; Hardware acceleration; Hardware/software co-design; Image processing - methods; Image processing applications; Multiple robot; PC-based; Pixel images; Real time; Real time performance; Real-time image processing; Remote sensing applications; Software project; Software solution; Solution process; Computer vision; Field programmable gate arrays (FPGA); Global system for mobile communications; Hardware; Image analysis; Remote sensing; Robotics; Embedded systems |
| Año: | 2012 |
| Volumen: | 7441 LNCS |
| Página de inicio: | 599 |
| Página de fin: | 606 |
| DOI: | http://dx.doi.org/10.1007/978-3-642-33275-3_74 |
| Título revista: | 17th Iberoamerican Congress on Progress in Pattern Recognition, Image Analysis, Computer Vision, and Applications, CIARP 2012 |
| Título revista abreviado: | Lect. Notes Comput. Sci. |
| ISSN: | 03029743 |
| PDF: | https://bibliotecadigital.exactas.uba.ar/download/paper/paper_03029743_v7441LNCS_n_p599_Pedre.pdf |
| Registro: | https://bibliotecadigital.exactas.uba.ar/collection/paper/document/paper_03029743_v7441LNCS_n_p599_Pedre |
Referencias:
- (2012) CUDA: Parallel Programming, , http://www.nvidia.com, January
- Jošth, R., Real-time PCA calculation for spectral imaging (using SIMD and GP-GPU) (2012) Journal of Real-Time Image Processing, pp. 1-9
- Cornelis, N., Van Gool, L., Fast scale invariant feature detection and matching on programmable graphics hardware IEEE International Conference on Computer Vision and Pattern Recognition, CVPR, Anchorage Alaska (June 2008)
- Diaz, J., FPGA-based real-time optical-flow system (2006) IEEE Transactions on Circuits and Systems for Video Technology, 16 (2), pp. 274-279
- Pedre, S., Stoliar, A., Borensztejn, P., Real Time Hot Spot Detection using FPGA (2009) 14th Iberoamerican Congress on Pattern Recognition, pp. 595-602. , Springer
- Bonato, V., Marques, E., Constantinides, G.A., A Parallel Hardware Architecture for Scale and Rotation Invariant Feature Detection (2008) Transactions on Circuits and Systems for Video Technology, 18 (12), pp. 1703-1712
- Jordan, H., Dyck, W., Smodic, R., A co-processed contour tracing algorithm for a smart camera (2010) Journal of RealTime Image Processing, 6 (1), pp. 23-31
- Castillo, A., Shkvarko, Y., Torres Roman, D., Perez Meana, H., Convex regularization based hardware/software co-design for real-time enhancement of remote sensing imagery (2009) Journal of Real-Time Image Processing, 4, pp. 261-272
- Bailey, B., Martin, G., Piziali, A., (2007) ESL Design and Verification: A Prescription for Electronic System-Level Methodology, , Morgan Kaufmann
- Pedre, S., Krajník, T., Todorovich, E., Borensztejn, P., A co-design methodology for processor-centric embedded systems with hardware acceleration using FPGA (2012) IEEE 8th Southern Programmable Logic Conference, pp. 7-14. , IEEE, Brazil
- Mallet, F., André, C., DeAntoni, J., Executing AADL Models with UML/MARTE (2009) International Conference of Engineering of Complex Computer Systems, pp. 371-376. , IEEE, Germany
- Mueller, W., Rosti, A., Bocchio, S., Riccobene, E., Scandurra, P., Dehaene, W., Vanderperren, Y., Ku, L., UML for ESL Design - Basic Principles, Tools, and Applications (2006) IEEE/ACM Int. Conf. on Computer Aided Design, pp. 73-80. , November
- Silva-Filho, A.G., An ESL Approach for Energy Consumption Analysis of Cache Memories in SoC Platforms (2011) International Journal of Reconfigurable Computing, pp. 1-12
- (2011) Jacquard, , http://www.jacquardcomputing.com/roccc/, ROCCC 2.0 October
- (2011) CatapultC, , http://www.mentor.com/esl/catapult, October
- (2011) Nallatech: DIME-C, , www.nallatech.com/Development-Tools/dime-c.html, October
- Gaisler, J., A structured VHDL design method (2004) Fault-tolerant Microprocessors for Space Applications. Gaisler Research, pp. 41-50
- (2011), http://www.esa.int, European Space Agency VHDL October; Kulich, M., SyRoTek - On an e-Learning System for Mobile Robotics and Artificial Intelligence (2009) ICAART 2009, pp. 275-280. , INSTICC Press, Setúbal
Citas:
---------- APA ----------
Pedre, S., Krajník, T., Todorovich, E. & Borensztejn, P. (2012) . Hardware/software co-design for real time embedded image processing: A case study. 17th Iberoamerican Congress on Progress in Pattern Recognition, Image Analysis, Computer Vision, and Applications, CIARP 2012, 7441 LNCS, 599-606.http://dx.doi.org/10.1007/978-3-642-33275-3_74
---------- CHICAGO ----------
Pedre, S., Krajník, T., Todorovich, E., Borensztejn, P. "Hardware/software co-design for real time embedded image processing: A case study" . 17th Iberoamerican Congress on Progress in Pattern Recognition, Image Analysis, Computer Vision, and Applications, CIARP 2012 7441 LNCS (2012) : 599-606.http://dx.doi.org/10.1007/978-3-642-33275-3_74
---------- MLA ----------
Pedre, S., Krajník, T., Todorovich, E., Borensztejn, P. "Hardware/software co-design for real time embedded image processing: A case study" . 17th Iberoamerican Congress on Progress in Pattern Recognition, Image Analysis, Computer Vision, and Applications, CIARP 2012, vol. 7441 LNCS, 2012, pp. 599-606.http://dx.doi.org/10.1007/978-3-642-33275-3_74
---------- VANCOUVER ----------
Pedre, S., Krajník, T., Todorovich, E., Borensztejn, P. Hardware/software co-design for real time embedded image processing: A case study. Lect. Notes Comput. Sci. 2012;7441 LNCS:599-606.http://dx.doi.org/10.1007/978-3-642-33275-3_74
