Abstract:
Many image processing applications need real time performance, while having restrictions of size, weight and power consumption. These include a wide range of embedded systems from remote sensing applications to mobile phones. FPGA-based solutions are common for these applications, their main drawback being long development time. In this work a co-design methodology for processor-centric embedded systems with hardware acceleration using FPGAs is applied to an image processing method for localization of multiple robots. The goal of the methodology is to achieve a real-time embedded solution using hardware acceleration, but with development time similar to software projects. The final embedded co-designed solution processes 1600×1200 pixel images at a rate of 25 fps, achieving a 12.6× acceleration from the original software solution. This solution runs with a comparable speed as up-to-date PC-based systems, and it is smaller, cheaper and demands less power. © 2012 Springer-Verlag.
Registro:
Documento: |
Artículo
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Título: | Hardware/software co-design for real time embedded image processing: A case study |
Autor: | Pedre, S.; Krajník, T.; Todorovich, E.; Borensztejn, P. |
Ciudad: | Buenos Aires |
Filiación: | Departamento de Computación, FCEN-UBA, Argentina Czech Technical University, Prague, Czech Republic Departamento de Computación Y Sistemas, FCE-UNICEN, Argentina
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Palabras clave: | FPGA; hardware/software co-design methodology; real time image processing; robotics; Co-design methodology; Development time; Hardware acceleration; Hardware/software co-design; Image processing - methods; Image processing applications; Multiple robot; PC-based; Pixel images; Real time; Real time performance; Real-time image processing; Remote sensing applications; Software project; Software solution; Solution process; Computer vision; Field programmable gate arrays (FPGA); Global system for mobile communications; Hardware; Image analysis; Remote sensing; Robotics; Embedded systems |
Año: | 2012
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Volumen: | 7441 LNCS
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Página de inicio: | 599
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Página de fin: | 606
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DOI: |
http://dx.doi.org/10.1007/978-3-642-33275-3_74 |
Título revista: | 17th Iberoamerican Congress on Progress in Pattern Recognition, Image Analysis, Computer Vision, and Applications, CIARP 2012
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Título revista abreviado: | Lect. Notes Comput. Sci.
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ISSN: | 03029743
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PDF: | https://bibliotecadigital.exactas.uba.ar/download/paper/paper_03029743_v7441LNCS_n_p599_Pedre.pdf |
Registro: | https://bibliotecadigital.exactas.uba.ar/collection/paper/document/paper_03029743_v7441LNCS_n_p599_Pedre |
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Citas:
---------- APA ----------
Pedre, S., Krajník, T., Todorovich, E. & Borensztejn, P.
(2012)
. Hardware/software co-design for real time embedded image processing: A case study. 17th Iberoamerican Congress on Progress in Pattern Recognition, Image Analysis, Computer Vision, and Applications, CIARP 2012, 7441 LNCS, 599-606.
http://dx.doi.org/10.1007/978-3-642-33275-3_74---------- CHICAGO ----------
Pedre, S., Krajník, T., Todorovich, E., Borensztejn, P.
"Hardware/software co-design for real time embedded image processing: A case study"
. 17th Iberoamerican Congress on Progress in Pattern Recognition, Image Analysis, Computer Vision, and Applications, CIARP 2012 7441 LNCS
(2012) : 599-606.
http://dx.doi.org/10.1007/978-3-642-33275-3_74---------- MLA ----------
Pedre, S., Krajník, T., Todorovich, E., Borensztejn, P.
"Hardware/software co-design for real time embedded image processing: A case study"
. 17th Iberoamerican Congress on Progress in Pattern Recognition, Image Analysis, Computer Vision, and Applications, CIARP 2012, vol. 7441 LNCS, 2012, pp. 599-606.
http://dx.doi.org/10.1007/978-3-642-33275-3_74---------- VANCOUVER ----------
Pedre, S., Krajník, T., Todorovich, E., Borensztejn, P. Hardware/software co-design for real time embedded image processing: A case study. Lect. Notes Comput. Sci. 2012;7441 LNCS:599-606.
http://dx.doi.org/10.1007/978-3-642-33275-3_74