Many image processing applications need real-time performance, while having restrictions of size, weight and power consumption. Common solutions, including hardware/software co-designs, are based on Field Programmable Gate Arrays (FPGAs). Their main drawback is long development time. In this work, a co-design methodology for processor-centric embedded systems with hardware acceleration using FPGAs is proposed. The goal of this methodology is to achieve real-time embedded solutions, using hardware acceleration, but achieving development time similar to that of software projects. Well established methodologies, techniques and languages from the software domain-such as Object-Oriented Paradigm design, Unified Modelling Language, and multithreading programming-are applied; and semiautomatic C-to-HDL translation tools and methods are used and compared. The methodology is applied to achieve an embedded implementation of a global vision algorithm for the localization of multiple robots in an e-learning robotic laboratory. The algorithm is specifically developed to work reliably 24/7 and to detect the robot's positions and headings even in the presence of partial occlusions and varying lighting conditions expectable in a normal classroom. The co-designed implementation of this algorithm processes 1,600 × 1,200 pixel images at a rate of 32 fps with an estimated energy consumption of 17 mJ per frame. It achieves a 16× acceleration and 92 % energy saving, which compares favorably with the most optimized embedded software solutions. This case study shows the usefulness of the proposed methodology for embedded real-time image processing applications. © 2013 Springer-Verlag Berlin Heidelberg.
Documento: | Artículo |
Título: | Accelerating embedded image processing for real time: a case study |
Autor: | Pedre, S.; Krajník, T.; Todorovich, E.; Borensztejn, P. |
Filiación: | Departamento de Computación, FCEN-UBA, Buenos Aires, Argentina Czech Technical University in Prague, Prague, Czech Republic Departamento de Computación y Sistemas, FCE-UNICEN, Tandil, Argentina |
Idioma: | Inglés |
Palabras clave: | Hardware acceleration; High level modeling; High level synthesis; Methodology for hardware/software co-design in FPGA; Multiple robot localization; Multithreaded programming; Real-time image processing |
Año: | 2013 |
Página de inicio: | 1 |
Página de fin: | 26 |
DOI: | http://dx.doi.org/10.1007/s11554-013-0353-2 |
Título revista: | Journal of Real-Time Image Processing |
Título revista abreviado: | J. Real-Time Image Process. |
ISSN: | 18618200 |
Registro: | https://bibliotecadigital.exactas.uba.ar/collection/paper/document/paper_18618200_v_n_p1_Pedre |