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Areces, C.; Carreiro, F.; Figueira, S.; Mera, S.; Beklemishev L.D.; Queiroz R. "Basic model theory for memory logics" (2011) 18th International Workshop on Logic, Language, Information and Computation, WoLLIC 2011. 6642 LNAI:20-34
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Abstract:

Memory logics is a family of modal logics whose semantics is specified in terms of relational models enriched with additional data structure to represent a memory. The logical language includes a collection of operations to access and modify the data structure. In this paper we study basic model properties of memory logics, and prove results concerning characterization, definability and interpolation. While the first two properties hold for all memory logics introduced in this article, interpolation fails in most cases. © 2011, Springer-Verlag Berlin Heidelberg.

Registro:

Documento: Artículo
Título:Basic model theory for memory logics
Autor:Areces, C.; Carreiro, F.; Figueira, S.; Mera, S.; Beklemishev L.D.; Queiroz R.
Filiación:INRIA Nancy Grand Est, Nancy, France
Dto. Computación, FCEN, Universidad de Buenos Aires, Argentina
CONICET, Argentina
Palabras clave:Computer circuits; Data structures; Interpolation; Semantics; Additional datum; Definability; Logical language; Modal logic; Model properties; Model theory; Relational Model; Computation theory
Año:2011
Volumen:6642 LNAI
Página de inicio:20
Página de fin:34
DOI: http://dx.doi.org/10.1007/978-3-642-20920-8_8
Título revista:18th International Workshop on Logic, Language, Information and Computation, WoLLIC 2011
Título revista abreviado:Lect. Notes Comput. Sci.
ISSN:03029743
Registro:https://bibliotecadigital.exactas.uba.ar/collection/paper/document/paper_03029743_v6642LNAI_n_p20_Areces

Referencias:

  • Areces, C., Figueira, D., Figueira, S., Mera, S., The expressive power of memory logics (2010) Review of Symbolic Logic, 4 (1)
  • Areces, C., Figueira, D., Gorín, D., Mera, S., Tableaux and model checking for memory logics (2009) TABLEAUX 2009. LNCS, 5607, pp. 47-61. , Giese, M., Waaler, A. (eds.), Springer, Heidelberg
  • Areces, C., Figueira, S., Mera, S., Completeness results for memory logics (2008) LFCS 2009. LNCS, 5407, pp. 16-30. , Artemov, S., Nerode, A. (eds.), Springer, Heidelberg
  • Areces, C., Figueira, D., Figueira, S., Mera, S., Expressive power and decidability for memory logics (2008) Wollic 2008. LNCS (LNAI), 5110, pp. 56-68. , Hodges, W., de Queiroz, R. (eds.), Springer, Heidelberg
  • Blackburn, P., De Rijke, M., Venema, Y., (2001) Modal Logic, , Cambridge University Press, Cambridge
  • Blackburn, P., Wolter, F., Van Benthem, J., (2006) Handbook of Modal Logics, , (eds.), Elsevier, Amsterdam
  • Carreiro, F., (2010) Characterization and Definability in Modal First-Order Fragments, , Master’s thesis, Universidad de Buenos Aires
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  • Hoogland, E., (2001) Definability and Interpolation: Model-Theoretic Investigations, , Ph.D. thesis, ILLC. Universiteit van Amsterdam
  • Keisler, H.J., (2008) The Ultraproduct Construction, , Proceedings of the Ultramath Conference, Pisa, Italy
  • Marx, M., Venema, Y., (1997) Multi-Dimensional Modal Logic, , Kluwer, Dordrecht
  • Mera, S., Modal Memory Logics. Ph.D. thesis, Universidad de Buenos Aires & Université Henri Poincare, Buenos Aires (2009) Argentina
  • Ten Cate, B., (2005) Model Theory for Extended Modal Languages, , Ph.D. thesis, University of Amsterdam, ILLC Publications, Ph. D. Dissertation series, Amsterdam
  • Venema, Y., Ultrafilter unions: An exercise in modal definability (2000) First Workshop on Logic and Language, pp. 303-310. , Universidad de SevillaA4 -

Citas:

---------- APA ----------
Areces, C., Carreiro, F., Figueira, S., Mera, S., Beklemishev L.D. & Queiroz R. (2011) . Basic model theory for memory logics. 18th International Workshop on Logic, Language, Information and Computation, WoLLIC 2011, 6642 LNAI, 20-34.
http://dx.doi.org/10.1007/978-3-642-20920-8_8
---------- CHICAGO ----------
Areces, C., Carreiro, F., Figueira, S., Mera, S., Beklemishev L.D., Queiroz R. "Basic model theory for memory logics" . 18th International Workshop on Logic, Language, Information and Computation, WoLLIC 2011 6642 LNAI (2011) : 20-34.
http://dx.doi.org/10.1007/978-3-642-20920-8_8
---------- MLA ----------
Areces, C., Carreiro, F., Figueira, S., Mera, S., Beklemishev L.D., Queiroz R. "Basic model theory for memory logics" . 18th International Workshop on Logic, Language, Information and Computation, WoLLIC 2011, vol. 6642 LNAI, 2011, pp. 20-34.
http://dx.doi.org/10.1007/978-3-642-20920-8_8
---------- VANCOUVER ----------
Areces, C., Carreiro, F., Figueira, S., Mera, S., Beklemishev L.D., Queiroz R. Basic model theory for memory logics. Lect. Notes Comput. Sci. 2011;6642 LNAI:20-34.
http://dx.doi.org/10.1007/978-3-642-20920-8_8